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Artificial Intelligence

AI Engineer Compiles 32-Bit RISC-V CPU Into Qwen LLM Weights

An experimental project blends the stock Qwen 3.5 4B AI model with a complete 32-bit RISC-V CPU, allowing it to execute code and perform exact arithmetic operations using its own weights as RAM.

AI Engineer Compiles 32-Bit RISC-V CPU Into Qwen LLM Weights

Introduction to Qwenputer

AI engineer Divyansh Agrawal has introduced an experimental project known as Qwenputer, which blends the stock Qwen 3.5 4B AI large language model with a fully functional 32-bit RISC-V CPU compiled and inserted directly into its weights. Detailed further in reports from Tom's Hardware, this setup enables the underlying model to execute processor arithmetic operations, run C and MicroPython code on its built-in CPU, and even play DOOM without relying on external runtimes or tool calls.

The developer showcased the achievement online, highlighting that the system successfully boots and runs the E1M1 level of DOOM on the embedded RISC-V architecture. While the game runs very slowly, the broader technical achievement demonstrates an unprecedented level of integration between neural network weights and traditional microprocessor instructions.

Qwenputer
(Image credit: Divyansh Agrawal ) · Source: Tom's Hardware

Technical Architecture and Fast Weights as RAM

The implementation behind Qwenputer leverages several creative engineering solutions. Most notably, the developer utilized Qwen's Gated DeltaNet (GND) state to serve as random-access memory (RAM). While using these fast weights as memory is not an entirely original concept, modifying the Qwen 3.5 architecture in this specific manner appears to be a first.

Unlike standard machine learning workflows, adding this CPU does not involve training model parameters. Instead, the RISC-V implementation consists of 11 transformer layers positioned in front of Qwen's own layers, where none of the weights are learned through traditional training. A compiler instead computes every single weight. Agrawal noted that the built-in CPU passes official RISC-V tests, matches QEMU program execution, and has successfully run 18 million instructions free-running without a single error.

Qwenputer
(Image credit: Divyansh Agrawal ) · Source: Tom's Hardware

Overcoming LLM Arithmetic Weaknesses

A persistent limitation of many large language models is their weakness in handling exact mathematical calculations. By embedding a dedicated hardware-equivalent CPU architecture directly inside the network, Qwenputer bypasses these hurdles. The model can send instructions and read back results natively without depending on external Python environments or tool use.

In practice, this integration gives users the ability to execute conventional programming code directly within the LLM. Both C and MicroPython are supported, opening up possibilities for precise computations embedded seamlessly into language model workflows.

Qwenputer
(Image credit: Divyansh Agrawal ) · Source: Tom's Hardware

Adding a Persistent Filesystem

Not content with embedding a processing unit into the neural weights, Agrawal also equipped the model with a filesystem. Because the DeltaNet state already provides functional RAM, extending the architecture to support storage proved to be a relatively straightforward addition.

The filesystem includes 1,024 storage slots capable of holding up to 512 files. Furthermore, this storage is fully persistent if the user saves the state at the conclusion of a conversation with the LLM, giving the AI model a form of long-term local data retention.

Qwenputer
Image related to the report from Tom's Hardware · Source: Tom's Hardware

Hardware Requirements and Availability

The massive expansion of resources required to compile a CPU and filesystem directly into the model has significantly increased its footprint. Qwenputer effectively doubles the size of the underlying Qwen 3.5 4B LLM, bringing the total size to nearly 19GB. Consequently, testing the experimental version requires a workstation equipped with 24GB of VRAM or more.

Current development efforts are focused on streamlining the coding experience and improving execution speed. Additional project details, documentation, and the MIT-licensed code are available via GitHub, while the experimental model weights can be accessed directly on Hugging Face as detailed in the Qwenputer developer blog.

Sources

  • Tom's HardwareAI model gets a 32-bit RISC-V CPU compiled directly into its weights, then runs DOOM on it — experimental AI model can run Doom and C code using its own weights as RAM

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