Veteran Microsoft Engineer Builds Custom PDP-11 RAM With AI
Confronted with steep vintage memory prices, a former Microsoft engineer turned to artificial intelligence and custom hardware design to build his own RAM board from scratch.
Radwan AbdulhadiEditor and technology writer
Tackling Vintage Hardware Costs
Faced with steep price tags for vintage computer components, veteran developer and former Microsoft engineer Dave Plummer decided to bypass traditional supply channels by building his own memory board. Known for his work on Windows components, Plummer turned his attention to vintage computing hardware by attempting to assemble a custom 4MB RAM solution for a 1970 PDP-11 system.
Because original memory expansions carried exorbitant costs, he enlisted modern technology tools to bridge the knowledge gap. Additional details regarding the build and its hurdles can be found in the original report by Tom's Hardware.
Designing the Custom FPGA Board
To accomplish the hardware build, Plummer utilized artificial intelligence via ChatGPT alongside an online circuit simulator to plan the intricate layout. Designed as a standalone Q-Bus card to interface with compatible system architecture, the board was tested on a backplane alongside an M8190 CPU board.
The central component of the memory controller is a Lattice MachXO2 FPGA chip, model 2000HC, which is connected to four ISSI 1 MB memory chips. The circuit also incorporates a U2S I/O chip, a bank of DIP switches, communication ports, and a selection of capacitors to complete the hardware design.
Overcoming Technical and Bus Hurdles
The development process was not without its initial setbacks. Plummer encountered early learning curves related to flash-programming the FPGA chip before successfully resolving those operational issues.
A more nuanced challenge stemmed from the architecture of the PDP-11 itself. The computer's memory bus design accesses information in whole words consisting of two bytes, utilizing the lowest bit in an address as a lane selector for the high or low byte. While the CPU handles byte selection automatically during read operations, custom memory controllers must return complete words and carefully handle write instructions to prevent corrupted data.
Alternative Approaches and Solutions
Following community feedback regarding how the memory controller handled word-addressing patterns, adjustments were made to the FPGA code to ensure proper operation. Commenters also suggested implementing memory in software using alternative microcontrollers wired directly to the system bus.
Plummer noted that he had previously experimented with software-driven interfaces, having utilized a modern QBone DEC interface board featuring a Beaglebone Black. Despite these alternative routes, the custom FPGA RAM project stands as a notable example of applying modern AI assistance to vintage hardware restoration.
Sources
- Tom's HardwareVeteran Microsoft engineer makes his own RAM from scratch using AI — custom FPGA board dodges extreme 1970s PDP-11 memory prices
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